In mainstream semiconductor technology, MOSFET (metal oxide semiconductor field-effect transistor) devices may be used as basic elements, for example as a switching element or as a charge storage element. A MOSFET device comprises a semiconductor channel region that is dielectrically coupled via a gate dielectric to a gate electrode. The semiconductor channel region is contacted at opposite sides by a source junction and a drain junction.
In order to improve performance of MOSFET devices, polysilicon, which used to be used as gate electrode material, has been replaced by metallic materials. Metallic gates do not suffer from the shortcomings of gate electrodes formed by semiconductor material, such as gate depletion, dopant diffusion or medium range resistance. Recently, there has been a significant interest for the application of silicides to form metal gate electrodes. In particular, fully-silicided (FUSI) gates show to be promising candidates. From a processing point of view, a FUSI gate can be implemented as a variation on a self-aligned silicidation process used in previous technology nodes, e.g. to reduce the sheet resistance of semiconductor regions. In the FUSI approach, silicide is formed in the gate electrode down to its interface with the gate dielectric, thereby fully consuming the polysilicon material of the gate electrode.
Ni-silicide appears to be an attractive candidate to form a gate electrode because it allows maintaining several aspects of the process flow applied in prior CMOS technology generations, such as patterning of the silicon gate and the self-aligned silicide-forming processes. A key property that has attracted attention to NiSi FUSI gates is the possibility to modulate their effective work function on a SiO2 gate dielectric by dopants which may allow for tuning of the threshold voltage (Vt) of nMOS and pMOS devices without the need for using a different bulk material for the gate electrode for forming both types of MOSFET. The integration and properties of Ni FUSI gates on high-k dielectrics is also of interest for advanced CMOS applications.
In “Modulation of the Ni FUSI work function by Yb doping: from midgap to n-type band-edge” in technical digest IEDM meeting 2005, p 630-633, H. Y., Yu et al. discloses a method for modulating the work function of a nickel silicide FUSI gate formed on a SiON gate dielectric by incorporating ytterbium in the nickel-silicon gate electrode. The work function of the Ni FUSI gate is reduced from 4.72 eV to 4.22 eV by doping with Yb. It was also reported that Yb is piled up at the interface between the gate electrode and the gate dielectric, which may promote diffusion of the Yb towards and into the gate dielectric.
Not only have there been attempts to replace the polysilicon gate electrode by a metallic gate electrode, but also attempts have been made to reduce the thickness of the gate dielectric layer. The thickness of a conventional silicon oxide gate dielectric has reached its practical limits. The equivalent electrical oxide thickness (EEOT) of the dielectric material needs to be in the 0.5 nm to 2 nm range to ensure good dielectric coupling. However, silicon oxide layers with a thickness of 0.5 nm to 2 nm may not be able to withstand voltages applied and thus a thicker dielectric layer is needed. This leads to the use of high-k dielectric materials which offer a sufficient physical thickness and a limited EEOT, the ratio being defined by the dielectric constant (k-value) of the dielectric material. For this purpose, other materials are being investigated as alternative materials to form the gate dielectric. In first instance silicon oxynitride is used as an alternative gate dielectric material. Other alternative dielectric materials are being considered which have an EEOT of a few nanometers but have a larger physical thickness. As these alternative materials are characterized by a higher dielectric constant compared to the dielectric constant of silicon oxide (k=3.9), they have been called high-k dielectric materials. These high-k dielectric materials have a k-value in the range of between 4 and 40.
When fabricating a MOSFET device having a FUSI gate electrode comprising a dopant, in particular a dopant used as a work function modulating element, it has been observed that the electrical characteristics of the MOSFET device deviate from a MOSFET device without such dopant. In particular, if an ytterbium doped nickel FUSI gate electrode of an n-type MOSFET is formed in particular on a silicon oxynitride gate dielectric, the leakage current through the gate dielectric may increase compared to an ytterbium-free nickel FUSI gate electrode. This is shown in FIG. 1 which illustrates the gate current density vs. gate voltage or Jgb(A/cm2)-Vgb(V) characteristic obtained for a capacitor structure comprising an Yb-free NiSi FUSI gate electrode formed on a SiON dielectric (indicated with reference number 20, filled squares) and for capacitor structures comprising a Yb-doped NiSi FUSI gate electrode formed on a SiON dielectric (indicated with reference number 21, filled diamonds for a 80 nm thick polysilicon layer doped with Yb at an energy of 30 keV, open squares for a 60 nm thick polysilicon layer doped with Yb at an energy of 30 keV and filled squares for a 40 nm thick polysilicon layer doped with Yb at an energy of 20 keV, in all cases the Yb concentration was 4e15 cm−2). The gate leakage current density for the Yb-doped NiSi FUSI gate electrode is about two orders of magnitude higher than the gate leakage current density for the NiSi FUSI gate electrode. This leakage current increases with decreasing gate dielectric thickness.
Also, the capacitance-voltage characteristics of such gate stack show anomalies which indicate the presence of a larger number of interface states Dit. This is shown in FIG. 2 which illustrates gate capacitance vs. gate voltage or Cgb(F)-Vgb(V) characteristics obtained for capacitor structures comprising an Yb-doped NiSi FUSI electrode formed on a SiON gate dielectric. FIG. 2 shows four curves obtained from four different devices. Two curves were obtained from devices formed by doping the NiSi FISU electrode with Yb at a dose of 4e15 cm−2 and with an energy of 40K and two curves were obtained from devices doped with Yb at a dose of 2e15 cm−2 and with an energy of 40K. It can be seen that all curves in FIG. 2 substantially coincide. What is more important is that a bump is observed in all of the capacitance-voltage curves which is indicated by the dotted zone 28. This bump is indicative for the presence of interface states Dit. Moreover, it has also been observed that the workfunction of the nickel ytterbium FUSI gate may vary with time.